Single Error Correction (SEC)-Double Adjacent Error Correction (DAEC) Verilog Code with Test Bench and Output
module magcomp (clk, A,B,output_signal);
input clk;
input [15:0]A, B;
output reg output_signal;
integer i;
integer j;
always @(posedge clk)
begin : looping
output_signal<=1'b1;
j=2; // A and B are equal if j=2
for(i=15;i>=0;i=i-1)
begin
if (A[i] ^ B[i])
begin
//AEQB <= 1'b0; enters here means A and B are not equal
j=j-1;
i=i-1;
if (j==0)
begin
//diff_1bit <= 1'b0;
//two input A and B are having more than 1 bit difference (more than distance one)
output_signal<=0;
disable looping;
end
end
end
end
endmodule
module magcomp_tb;
reg [15:0] A, B;
reg clk;
wire output_signal;
magcomp MC(.clk(clk), .A(A), .B(B), .output_signal(output_signal));
initial begin
$display("\t\tTime, \tCLK, \tA, \tB, \toutput_signal");
$monitor("\t\t%d, \t%b, \t%b, \t%b, \t%b", $time, clk, A, B, output_signal);
clk=0;
A=0;
B=0;
#2 A= 16'b0000000000000001;
#2 B= 16'b1000000000000000;
#4 A= 16'b1000000000000000;
#4 B= 16'b0000000000000000;
#6 A= 16'b0000000000100000;
#6 B= 16'b0000000000000100;
#8 A= 16'b0000001100000000;
#8 B= 16'b0000000000000000;
#10 A= 16'b0000000000001111;
#10 B= 16'b1110000000000000;
#12 A= 16'b0000000000000010;
#12 B= 16'b0000000000000001;
#14 A= 16'b0000000000000101;
#14 B= 16'b0000000000000001;
#16 A= 16'b0000000000000101;
#16 B= 16'b0000000000000101;
#18 A= 16'b0000000000001101;
#18 B= 16'b0000000000000111;
#20 $finish;
end
always
#1 clk = ~clk; //clock generator
endmodule
TERMINAL OUTPUT
Time, CLK, A, B, output_signal
0, 0, 0000000000000000, 0000000000000000, x
1, 1, 0000000000000000, 0000000000000000, 1
2, 0, 0000000000000001, 0000000000000000, 1
3, 1, 0000000000000001, 0000000000000000, 1
4, 0, 0000000000000001, 1000000000000000, 1
5, 1, 0000000000000001, 1000000000000000, 0
6, 0, 0000000000000001, 1000000000000000, 0
7, 1, 0000000000000001, 1000000000000000, 0
8, 0, 1000000000000000, 1000000000000000, 0
9, 1, 1000000000000000, 1000000000000000, 1
10, 0, 1000000000000000, 1000000000000000, 1
11, 1, 1000000000000000, 1000000000000000, 1
12, 0, 1000000000000000, 0000000000000000, 1
13, 1, 1000000000000000, 0000000000000000, 1
14, 0, 1000000000000000, 0000000000000000, 1
15, 1, 1000000000000000, 0000000000000000, 1
16, 0, 1000000000000000, 0000000000000000, 1
17, 1, 1000000000000000, 0000000000000000, 1
18, 0, 0000000000100000, 0000000000000000, 1
19, 1, 0000000000100000, 0000000000000000, 1
20, 0, 0000000000100000, 0000000000000000, 1
21, 1, 0000000000100000, 0000000000000000, 1
22, 0, 0000000000100000, 0000000000000000, 1
23, 1, 0000000000100000, 0000000000000000, 1
24, 0, 0000000000100000, 0000000000000100, 1
25, 1, 0000000000100000, 0000000000000100, 0
26, 0, 0000000000100000, 0000000000000100, 0
27, 1, 0000000000100000, 0000000000000100, 0
28, 0, 0000000000100000, 0000000000000100, 0
29, 1, 0000000000100000, 0000000000000100, 0
30, 0, 0000000000100000, 0000000000000100, 0
31, 1, 0000000000100000, 0000000000000100, 0
32, 0, 0000001100000000, 0000000000000100, 0
33, 1, 0000001100000000, 0000000000000100, 0
34, 0, 0000001100000000, 0000000000000100, 0
35, 1, 0000001100000000, 0000000000000100, 0
36, 0, 0000001100000000, 0000000000000100, 0
37, 1, 0000001100000000, 0000000000000100, 0
38, 0, 0000001100000000, 0000000000000100, 0
39, 1, 0000001100000000, 0000000000000100, 0
40, 0, 0000001100000000, 0000000000000000, 0
41, 1, 0000001100000000, 0000000000000000, 1
42, 0, 0000001100000000, 0000000000000000, 1
43, 1, 0000001100000000, 0000000000000000, 1
44, 0, 0000001100000000, 0000000000000000, 1
45, 1, 0000001100000000, 0000000000000000, 1
46, 0, 0000001100000000, 0000000000000000, 1
47, 1, 0000001100000000, 0000000000000000, 1
48, 0, 0000001100000000, 0000000000000000, 1
49, 1, 0000001100000000, 0000000000000000, 1
50, 0, 0000000000001111, 0000000000000000, 1
51, 1, 0000000000001111, 0000000000000000, 0
52, 0, 0000000000001111, 0000000000000000, 0
53, 1, 0000000000001111, 0000000000000000, 0
54, 0, 0000000000001111, 0000000000000000, 0
55, 1, 0000000000001111, 0000000000000000, 0
56, 0, 0000000000001111, 0000000000000000, 0
57, 1, 0000000000001111, 0000000000000000, 0
58, 0, 0000000000001111, 0000000000000000, 0
59, 1, 0000000000001111, 0000000000000000, 0
60, 0, 0000000000001111, 1110000000000000, 0
61, 1, 0000000000001111, 1110000000000000, 0
62, 0, 0000000000001111, 1110000000000000, 0
63, 1, 0000000000001111, 1110000000000000, 0
64, 0, 0000000000001111, 1110000000000000, 0
65, 1, 0000000000001111, 1110000000000000, 0
66, 0, 0000000000001111, 1110000000000000, 0
67, 1, 0000000000001111, 1110000000000000, 0
68, 0, 0000000000001111, 1110000000000000, 0
69, 1, 0000000000001111, 1110000000000000, 0
70, 0, 0000000000001111, 1110000000000000, 0
71, 1, 0000000000001111, 1110000000000000, 0
72, 0, 0000000000000010, 1110000000000000, 0
73, 1, 0000000000000010, 1110000000000000, 0
74, 0, 0000000000000010, 1110000000000000, 0
75, 1, 0000000000000010, 1110000000000000, 0
76, 0, 0000000000000010, 1110000000000000, 0
77, 1, 0000000000000010, 1110000000000000, 0
78, 0, 0000000000000010, 1110000000000000, 0
79, 1, 0000000000000010, 1110000000000000, 0
80, 0, 0000000000000010, 1110000000000000, 0
81, 1, 0000000000000010, 1110000000000000, 0
82, 0, 0000000000000010, 1110000000000000, 0
83, 1, 0000000000000010, 1110000000000000, 0
84, 0, 0000000000000010, 0000000000000001, 0
85, 1, 0000000000000010, 0000000000000001, 1
86, 0, 0000000000000010, 0000000000000001, 1
87, 1, 0000000000000010, 0000000000000001, 1
88, 0, 0000000000000010, 0000000000000001, 1
89, 1, 0000000000000010, 0000000000000001, 1
90, 0, 0000000000000010, 0000000000000001, 1
91, 1, 0000000000000010, 0000000000000001, 1
92, 0, 0000000000000010, 0000000000000001, 1
93, 1, 0000000000000010, 0000000000000001, 1
94, 0, 0000000000000010, 0000000000000001, 1
95, 1, 0000000000000010, 0000000000000001, 1
96, 0, 0000000000000010, 0000000000000001, 1
97, 1, 0000000000000010, 0000000000000001, 1
98, 0, 0000000000000101, 0000000000000001, 1
99, 1, 0000000000000101, 0000000000000001, 1
100, 0, 0000000000000101, 0000000000000001, 1
101, 1, 0000000000000101, 0000000000000001, 1
102, 0, 0000000000000101, 0000000000000001, 1
103, 1, 0000000000000101, 0000000000000001, 1
104, 0, 0000000000000101, 0000000000000001, 1
105, 1, 0000000000000101, 0000000000000001, 1
106, 0, 0000000000000101, 0000000000000001, 1
107, 1, 0000000000000101, 0000000000000001, 1
108, 0, 0000000000000101, 0000000000000001, 1
109, 1, 0000000000000101, 0000000000000001, 1
110, 0, 0000000000000101, 0000000000000001, 1
111, 1, 0000000000000101, 0000000000000001, 1
112, 0, 0000000000000101, 0000000000000001, 1
113, 1, 0000000000000101, 0000000000000001, 1
114, 0, 0000000000000101, 0000000000000001, 1
115, 1, 0000000000000101, 0000000000000001, 1
116, 0, 0000000000000101, 0000000000000001, 1
117, 1, 0000000000000101, 0000000000000001, 1
118, 0, 0000000000000101, 0000000000000001, 1
119, 1, 0000000000000101, 0000000000000001, 1
120, 0, 0000000000000101, 0000000000000001, 1
121, 1, 0000000000000101, 0000000000000001, 1
122, 0, 0000000000000101, 0000000000000001, 1
123, 1, 0000000000000101, 0000000000000001, 1
124, 0, 0000000000000101, 0000000000000001, 1
125, 1, 0000000000000101, 0000000000000001, 1
126, 0, 0000000000000101, 0000000000000001, 1
127, 1, 0000000000000101, 0000000000000001, 1
128, 0, 0000000000000101, 0000000000000001, 1
129, 1, 0000000000000101, 0000000000000001, 1
130, 0, 0000000000000101, 0000000000000001, 1
131, 1, 0000000000000101, 0000000000000001, 1
132, 0, 0000000000000101, 0000000000000001, 1
133, 1, 0000000000000101, 0000000000000001, 1
134, 0, 0000000000000101, 0000000000000001, 1
135, 1, 0000000000000101, 0000000000000001, 1
136, 0, 0000000000000101, 0000000000000001, 1
137, 1, 0000000000000101, 0000000000000001, 1
138, 0, 0000000000000101, 0000000000000001, 1
139, 1, 0000000000000101, 0000000000000001, 1
140, 0, 0000000000000101, 0000000000000001, 1
141, 1, 0000000000000101, 0000000000000001, 1
142, 0, 0000000000000101, 0000000000000001, 1
143, 1, 0000000000000101, 0000000000000001, 1
144, 0, 0000000000000101, 0000000000000101, 1
145, 1, 0000000000000101, 0000000000000101, 1
146, 0, 0000000000000101, 0000000000000101, 1
147, 1, 0000000000000101, 0000000000000101, 1
148, 0, 0000000000000101, 0000000000000101, 1
149, 1, 0000000000000101, 0000000000000101, 1
150, 0, 0000000000000101, 0000000000000101, 1
151, 1, 0000000000000101, 0000000000000101, 1
152, 0, 0000000000000101, 0000000000000101, 1
153, 1, 0000000000000101, 0000000000000101, 1
154, 0, 0000000000000101, 0000000000000101, 1
155, 1, 0000000000000101, 0000000000000101, 1
156, 0, 0000000000000101, 0000000000000101, 1
157, 1, 0000000000000101, 0000000000000101, 1
158, 0, 0000000000000101, 0000000000000101, 1
159, 1, 0000000000000101, 0000000000000101, 1
160, 0, 0000000000000101, 0000000000000101, 1
161, 1, 0000000000000101, 0000000000000101, 1
162, 0, 0000000000001101, 0000000000000101, 1
163, 1, 0000000000001101, 0000000000000101, 1
164, 0, 0000000000001101, 0000000000000101, 1
165, 1, 0000000000001101, 0000000000000101, 1
166, 0, 0000000000001101, 0000000000000101, 1
167, 1, 0000000000001101, 0000000000000101, 1
168, 0, 0000000000001101, 0000000000000101, 1
169, 1, 0000000000001101, 0000000000000101, 1
170, 0, 0000000000001101, 0000000000000101, 1
171, 1, 0000000000001101, 0000000000000101, 1
172, 0, 0000000000001101, 0000000000000101, 1
173, 1, 0000000000001101, 0000000000000101, 1
174, 0, 0000000000001101, 0000000000000101, 1
175, 1, 0000000000001101, 0000000000000101, 1
176, 0, 0000000000001101, 0000000000000101, 1
177, 1, 0000000000001101, 0000000000000101, 1
178, 0, 0000000000001101, 0000000000000101, 1
179, 1, 0000000000001101, 0000000000000101, 1
180, 0, 0000000000001101, 0000000000000111, 1
181, 1, 0000000000001101, 0000000000000111, 0
182, 0, 0000000000001101, 0000000000000111, 0
183, 1, 0000000000001101, 0000000000000111, 0
184, 0, 0000000000001101, 0000000000000111, 0
185, 1, 0000000000001101, 0000000000000111, 0
186, 0, 0000000000001101, 0000000000000111, 0
187, 1, 0000000000001101, 0000000000000111, 0
188, 0, 0000000000001101, 0000000000000111, 0
189, 1, 0000000000001101, 0000000000000111, 0
190, 0, 0000000000001101, 0000000000000111, 0
191, 1, 0000000000001101, 0000000000000111, 0
192, 0, 0000000000001101, 0000000000000111, 0
193, 1, 0000000000001101, 0000000000000111, 0
194, 0, 0000000000001101, 0000000000000111, 0
195, 1, 0000000000001101, 0000000000000111, 0
196, 0, 0000000000001101, 0000000000000111, 0
197, 1, 0000000000001101, 0000000000000111, 0
198, 0, 0000000000001101, 0000000000000111, 0
199, 1, 0000000000001101, 0000000000000111, 0
200, 0, 0000000000001101, 0000000000000111, 0
//////////////////////////////////////////////////////////////////////////////////////////
Distance one 16 bit comparator with test bench
module magcomp (clk, A,B,output_signal);
input clk;
input [15:0]A, B;
output reg output_signal;
integer i;
integer j;
always @(posedge clk)
begin : looping
output_signal<=1'b1;
j=2; // A and B are equal if j=2
for(i=15;i>=0;i=i-1)
begin
if (A[i] ^ B[i])
begin
//AEQB <= 1'b0; enters here means A and B are not equal
j=j-1;
if (j==0)
begin
//diff_1bit <= 1'b0;
//two input A and B are having more than 1 bit difference (more than distance one)
output_signal<=0;
disable looping;
end
end
end
end
endmodule
module magcomp_tb;
reg [15:0] A, B;
reg clk;
wire output_signal;
magcomp MC(.clk(clk), .A(A), .B(B), .output_signal(output_signal));
initial begin
$display("\t\tTime, \tCLK, \tA, \tB, \toutput_signal");
$monitor("\t\t%d, \t%b, \t%b, \t%b, \t%b", $time, clk, A, B, output_signal);
clk=0;
A=0;
B=0;
#2 A= 16'b0000000000000001;
#2 B= 16'b1000000000000000;
#4 A= 16'b1000000000000000;
#4 B= 16'b0000000000000000;
#6 A= 16'b0000000000100000;
#6 B= 16'b0000000000000100;
#8 A= 16'b0000001100000000;
#8 B= 16'b0000000000001000;
#10 A= 16'b0000000000001111;
#10 B= 16'b1110000000000000;
#12 A= 16'b0000000000000010;
#12 B= 16'b0000000000000001;
#14 A= 16'b0000000000000101;
#14 B= 16'b0000000000000001;
#16 A= 16'b0000000000000101;
#16 B= 16'b0001011101110110;
#18 A= 16'b0000000000000101;
#18 B= 16'b0000000000000111;
#20 $finish;
end
always
#1 clk = ~clk; //clock generator
endmodule
//////////////////////////////////////////////////////////////////////////////////////////////////////////////
Standard Comparator in Verilog with test bench
///// clocked digital design for 16bit comparator
module magcomp (clk, A,B,ALTB,AGTB,AEQB);
input clk;
input [15:0]A, B;
output reg ALTB,AGTB,AEQB;
reg [15:0]f;
integer i;
///// clocked digital design for 16bit comparator
always @(posedge clk)
begin : looping
AGTB <= 0;
ALTB <= 0;
AEQB <= 1'b1;
for(i=15;i>=0;i=i-1)
begin
////// logic for inequality
f[i] = A[i] ^ B[i]; // xoring bit by bit to check where bits are unequal
if (f[i])
begin
AGTB <= A[i];
ALTB <= B[i];
AEQB <= 1'b0;
disable looping;
end
end
end
endmodule
//////test bench
module magcomp_tb;
reg [15:0] A, B;
reg clk;
wire ALTB, AGTB, AEQB;
magcomp MC(.clk(clk), .A(A), .B(B), .ALTB(ALTB), .AGTB(AGTB), .AEQB(AEQB));
initial begin
$display("\t\tTime, \tCLK, \tA, \tB, \tALTB, \tAGTB, \tAEQB");
$monitor("\t\t%d, \t%b, \t%d, \t%d, \t%b, \t%b, \t%b", $time, clk, A, B, ALTB, AGTB, AEQB);
clk=0;
A=0;
B=0;
#2 A= 16'b0111011101110111;
#2 B= 16'b0110011001100110;
#4 A= 16'b0110011001100110;
#4 B= 16'b0111011101110111;
#6 A= 16'b0111011101110111;
#6 B= 16'b0111011101110111;
#8 A= 16'b0111011101110110;
#8 B= 16'b0111011101110111;
#10 A= 16'b0111011101110110;
#10 B= 16'b0000000000000101;
#12 A= 16'b0000000000000010;
#12 B= 16'b0000000000000101;
#10 A= 16'b0000000000000101;
#10 B= 16'b0001011101110110;
#16 $finish;
end
always
#1 clk = ~clk; //clock generator
endmodule
/////////////////////////////////////////////////////////////////////////////////////////////////////
Finding Circular Convolution of Equal and Unequal Length Signals
clc; clear all;
close all;
import cconv11.*;
x = input(‘Enter signal x = ‘);
h = input(‘Enter signal h = ‘);
p = input(‘Enter period p = ‘);
len1=length(x);
len2=length(h);
if (len1>len2)
max=len1; min=len2; x1=x; h1=h;
else
max=len2; min=len1; x1=h; h1=x;
end
if (p<min)
%abort;
display(‘invalid/lesser period’);
break;
end
h111=zeros();
% padd (p-min) zeroes to h1
for i=1:p;
if (i<=min)
h111(i)=h1(i);
else
h111(i)=0;
end
end
h111
if (p>max)
% padd (p-max) zeroes to x1
maxpadd=zeros(1:p-max);
x111=[x1,maxpadd]
end
% call the function for circular convolution
y=cconv11(x111,h111,p)
/////////////////////////////////////////////////////////////////////////////////////////////////////////////////
function [y] = cconv11( x11, h11, p )
%UNTITLED2 Summary of this function goes here
% Detailed explanation goes here
% y[0] = x(0)h(0)+x(1)h(-1)+x(2)h(-2)+x(3)h(-3)
% y[1] = x(0)h(1)+x(1)h(0)+x(2)h(-1)+x(3)h(-2)
len1 = length(x11);
%len2 = length(h11);
y=zeros();
hcol=h11′;
H(:,1)=hcol;
for m=1:p-1;
H(:,m+1)=[hcol(end);hcol(1:end-1)];
hcol=[hcol(end);hcol(1:end-1)];
end
for i=1:p;
acc=0;
for j=1:len1;
acc = acc+x11(j)*H(i,mod(j-1,p)+1);
end
y(i)=acc;
end
end
Nitin R Satpute 